Demand-driven register file for multithreaded mobile GPUs

A Power Aware Cache and Register File Design Space Exploration

Register Efficient Dynamic Memory Allocator for GPUs

We compare five existing dynamic memory allocators optimized for GPUs and show their strengths and weaknesses. In the measurements we use three generic evaluation tests proposed in the past and we add one with a real workload, where dynamic memory allocation is used in building the k-d tree data structure. Following the performance analysis we propose a new dynamic memory allocator and its vari...

Register Efficient Memory Allocator for GPUs

We compare four existing dynamic memory allocators optimized for GPUs and show their strengths and weaknesses. In the measurements we use three generic evaluation tests proposed in the literature and add one with a real workload where dynamic memory allocation is used for building the kd-tree data structure. Following the performance analysis we propose a new dynamic memory allocator and its va...

A multithreaded discrete-event driven mobile sensor network simulator

In this paper, we present a multithreaded discreteevent driven mobile sensor network simulator. The simulator supports node mobility, application and MAC layer protocols, radio range variations and mobile agents execution. The multithreaded approach can take advantage of the power of multi-core CPU efficiently. The schedule of the multi-threads increases the probability of the uncertainty in si...

Scalable Distributed Register File

In microarchitectural design, conceptual simplicity does not always lead to reduced technological complexity. VLSI design offers several standard structures which get very inefficient when they are scaled up. For instance, the superscalar OOO processing model is conceptually simple – with the controlflow oriented front-end and the dataflow oriented backend – but simply scaling the structures in...